Simulink PLC Coder

Generate IEC 61131-3 Structured Text and Ladder Diagrams for PLCs and PACs

Simulink PLC Coder™ generates hardware-independent IEC 61131-3 Structured Text and Ladder Diagrams from Simulink^®models, Stateflow^® charts, and MATLAB^® functions. Structured Text is generated in PLCopen XML and other file formats supported by widely used integrated development environments (IDEs), including 3S-Smart Software Solutions CODESYS^®, Rockwell Automation Studio 5000, Siemens TIA Portal, and Omron^® Sysmac^® Studio. Ladder diagrams are generated in file formats supported by Rockwell Automation Studio 5000. As a result, you can compile and deploy your application to numerous programmable logic controller (PLC) and programmable automation controller (PAC) devices.

Simulink PLC Coder generates test benches that help you verify the Structured Text and Ladder Diagrams using PLC and PAC IDEs and simulation tools. It also provides code generation reports with static code metrics and bidirectional traceability between model and code. Support for industry standards is available through IEC Certification Kit (for IEC 61508 and IEC 61511).

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Run Anywhere
Code Optimization, Testing, and Verification
Success Stories

What Is Simulink PLC Coder?

Run Anywhere

Generate Structured Text and Ladder Diagrams. Deploy code royalty-free.

Support for Third-Party IDEs

Simulink PLC Coder generates Structured Text in a variety of file formats used by third-party IDEs, including Siemens^® STEP 7/TIA Portal, Rockwell Automation^® Studio 5000, 3S CODESYS^®, and PLCopen XML. Simulink PLC Coder also generates Ladder Diagrams for Rockwell Automation Studio 5000.

IDEs Supported for Structured Text and Ladder Diagram Code Generation

Hardware Support

Simulink PLC Coder supports many third-party IDEs, including Siemens STEP 7/TIA Portal, Rockwell Automation Studio 5000, 3S CODESYS, and PLCopen XML.

Generate Structured Text

With support for more than 180 Simulink blocks, all Stateflow constructs, and many MATLAB functions, Simulink PLC Coder generates Structured Text from your control system models comprising feedback loops, mode and state logic, and math-intensive algorithms.

Supported Blocks

Generate and Examine Structured Text Code

Import Structured Text Code Automatically

Import and Verify Structured Text Code

More than 180 Simulink blocks, all Stateflow constructs, and many MATLAB functions are supported by Simulink PLC Coder.

Import and Generate Ladder Diagrams

Import Rockwell Automation Studio 5000 Ladder Diagrams into Simulink for simulation and verification. Generate Ladder Diagrams from Simulink models for Studio 5000. Validate generated Ladder Diagrams by generating and executing the test bench running on the IDE’s emulator.

Ladder Diagram Modeling, Simulation, and Code Generation

Import Ladder Diagram into Simulink

Instructions Supported in Ladder Diagram

Generate a Ladder Diagram and import it into an IDE.

Code Optimization, Testing, and Verification

Ensure the generated code operates efficiently and correctly on the PLC.

Code Optimization

Simulink PLC Coder applies optimizations by default to reduce memory size and increase execution speed of the generated Structured Text and Ladder Diagrams. These optimizations include dead-code elimination, expression folding, and subsystem reuse.

PLC Coder Optimization Options

Example of optimized Structured Text. Simulink PLC Coder generates optimized, well-integrated code for Simulink, Stateflow, and MATLAB functions.

Commenting, Bidirectional Tracing, and Documenting Code

Comments, user-specified block descriptions, and bidirectional links enable you to navigate and trace between Simulink model components and the generated code. The code generation report consolidates all information for code reviews and debugging.

Create and Use Code Generation Reports

Information in Code Generation Reports

Working with the Static Code Metrics Report

Code generation and traceability reports enable you to navigate and trace between Simulink model components and the generated code.

Code Test and Verification

Generate a test bench to verify Simulink simulation results match results in PLC within an acceptable tolerance. Run hardware-in-the-loop testing in real time using Simulink PLC Coder together with Simulink Coder™, Simulink Real-Time™, and a Speedgoat target computer.

How Test Bench Verification Works

Import and Verify Structured Text Code

Verify Generated Code with Multiple Test Benches

Using Simulink Test with Simulink PLC Coder

A test harness, generated to verify that the model simulation results match the Structured Text and Ladder Diagram execution results with an acceptable tolerance.